1. Field of the Invention
The present invention relates to a power inverter device using switching elements, more specifically, to a power inverter device which can reduce a surge voltage induced during switching of semiconductor switching elements therein.
2. Conventional Art
It has been known that in a power inverter device constituted by using semiconductor switching elements a spike shaped surge voltage is induced during switching of the semiconductor switching elements. When assuming a stray parasitic inductance of power distribution buses themselves of the device is L and current variation rate thereof is di/dt, a surge voltage having magnitude of -L.multidot.di/dt is induced therein. In these days the switching speed of the semiconductor switching elements is increased as well as the current variation rate, which is also increased. Thereby the level of the induced surge voltage tends to increase. For this reason, in order to protect semiconductor switching elements from such surge voltage, many technical measures for reducing inductance of the power distribution buses are proposed.
For example, JP-A-7-203686(1995) discloses one of such technical measures for reducing the inductances of the above mentioned power distribution buses, which is called herein below the first conventional approach, in which each of two power distribution buses, through which currents flow in opposite directions comprises a conductor plate having a wide width. The two conductor plates are positioned closely. The first conventional approach will be explained with reference to FIG. 10. In the circuit diagram of FIG. 10, a DC power source unit 1 and a three phase inverter unit 2 are connected via two power distribution buses including a positive polarity side and a negative polarity side. Since currents in opposite directions always flow through these two power distribution buses, two opposing magnetic fluxes caused by the respective currents are canceled out by positioning these two power distribution buses closely. Thereby inductances L.sub.1 and L.sub.2 of the respective power distribution buses are reduced.
Further, JP-A-7-131981(1995) discloses another technical measure for reducing the inductances of the power distribution buses, referred to herein below as second conventional approach, in which collective power distribution bus bars formed by laminating a plurality of conductor plates are used while interposing an insulating material therebetween. With this second technical measure the inductances of the power distribution buses are also reduced, and further, through the use of the collective power distribution bus bars, the steps for assembling the power inverter device are reduced.
In a power inverter device of a comparatively large capacity, the size of the device is enlarged and the inductances of the power distribution buses are increased. Therefore, a DC capacitor bank for smoothing use is generally provided for each of the phases of the power inverter device. For example, a circuit for a neutral point clamped 3 level inverter is constructed as illustrated in FIG. 4. The inverter in FIG. 4 is provided with smoothing use DC capacitor banks 31 and 32 in respective units U, V, and W thereof. When the inverter is provided with these smoothing use capacitor banks for respective phases, the magnitude of a surge voltage induced during the switching of the switching elements therein is determined by the magnitude of inductances between the smoothing use capacitor banks and the switching elements in the inverter. Thereby, generation of a high voltage surge affected by DC buses having large inductances is prevented.
However, when using fast switching elements such as IGBTs as the semiconductor switching elements, the variation rate of commutation current is also large, therefore it is required to reduce inductances of power distribution buses even within the inverter as much as possible. However, when applying the above mentioned conventional technical measures to the power inverter device using the neutral point clamped 3 level inverter as illustrated in FIG. 4, the following problems arise.
In the neutral point clamped 3 level inverter, six power distribution bus bars 51 through 56 are used. When applying the first technical measure, it is necessary to place the two power distribution bus bars through which currents in opposite directions always flow close to each other. However, the currents flowing through the power distribution bus bars vary depending on differences of on and off conditions of the switching elements and the direction of load current in the neutral point clamped 3 level inverter, and no combination of two power distribution bus bars through which currents in opposite directions always flow exists. Therefore, even if certain two power distribution bus bars are placed close, no effect of reducing the inductances can be obtained with some of the inverter operations and the surge voltage can not be suppressed.
On one hand, through application of the second technical measure it is possible to prepare conductor plates having wide width and same size for the power distribution bus bars and to place six of the prepared conductor plates close via respective insulating materials. In this instance, reduction of the inductances of the power distribution bus bars can be achieved. However, for the neutral point clamped 3 level inverter the conductor plates necessary for the power distribution have to be laminated in six layers which causes a problem of in the complexity of the structure. For example, when connecting a terminal of an electrical part to a certain power distribution bus bar, it is necessary to form respective escape holes for the remaining five power distribution bus bars so as to prevent an electrical contact with the connecting portion. Therefore, a problem of increasing the manufacturing cost arises. Other than the above problem because of the necessity of six conductor plates of the same size, the weight of the power distribution bus bars necessary for the power distribution increases which causes a problem of mechanical unstability of the device.